New Memory Chip Could Boost Computer Speeds

Staff Writer

A radical new computer chip architecture may increase memory and allow computer users to begin work instantly after turning on a machine. In the 13 May issue of Electronics Letters, researchers describe a blueprint for a memory chip that would do away with traditional capacitors, slashing the real estate of each memory cell by more than half. The new design should prove easy to integrate with number-crunching processor chips and should retain working memory even when a computer is off.

Researchers from Cambridge University and the Japanese electronics giant Hitachi sought to figure out how to duplicate the ability of standard chips to store data as 1's and 0's, but in less space. In these dynamic random access memory (DRAM) chips, capacitors are coupled with metal oxide semiconductor field-effect transistors, or MOSFETs, which act like doorways that open when writing and reading data. The open-sesame moment happens when a voltage is applied to a gate electrode, which increases electrical conductivity between two other electrodes, the "source" and the "drain." In a DRAM, the capacitor is wired to the drain: When data is written, electrons stream from source to drain, onto the capacitor. When data is read, electrons flow the reverse route, back to the source.

Transistors can shuttle single electrons, so their size presents no obstacle to shrinking a chip. To tackle the real problem--space-hogging capacitors--the researchers had to devise a novel way to store charge. Their solution: a stack of four silicon pads. The top and bottom pads, doped with phosphorous to conduct like a metal, are the source and drain. The undoped pads in the middle act as a channel for electrons. Surrounding the stack is a gate electrode; the entire array is positioned atop a MOSFET that detects charge in this pancake-style storage bin--essentially, a transistor posing as a capacitor.

The new set-up can read and write data in billionths of a second, as fast as DRAM, one of the traditional architecture's greatest strengths. It also could eliminate some of DRAM's shortcomings. For one, DRAM capacitors are wired to metal contacts that siphon off charge, even when the MOSFET doorway is closed. Thus when a computer is on, DRAM capacitors must be recharged continually, and when it is off, all their stored data is lost. The new memory cell, in theory, can hang onto charge for 10 years or more, allowing it to retain memory with the power off, says Hitachi team member David Williams.

The new approach is "excellent work," says Stephen Chou, an electrical engineer at Princeton University in New Jersey. Hitachi is so enamored with the early results that it has already begun pushing the experimental design into commercial development.

Posted in Math, Technology